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55:18

Are You Ready for 1000-Way Parallelism on a Single Chip?

Posted by Andreas Olofsson  on  Jul 03, 2014 2

Andreas Olofsson reviews the history of processors and outlines some of the challenges ahead, introducing project Parallella meant to speed up the transition to massively parallel computing.

57:47

The Yin and Yang of Hardware Heterogeneity: Can Software Survive?

Posted by Kathryn S. McKinley  on  Jan 12, 2014

Kathryn S. McKinley discusses research approaches and results that abstract, choose, and exploit hardware heterogeneity providing computational power at low energy consumption levels.

52:07

Programming a 144-computer Chip to Minimize Power

Posted by Chuck Moore  on  Dec 18, 2013 3

Chuck Moore discusses what it takes to program a 144-core asynchronous chip that consumes only 7 pJ/inst, the idle cores taking just 100 nW while the active ones need 4mW running at 666 Mips: tight coding to minimize the number of instructions executed, reducing instruction fetches, transistor switching, and duty cycle.

37:08

Piplin – A DSL for Describing Silicon in Clojure

Posted by David Greenberg  on  Sep 04, 2013

David Greenberg introduces Piplin, a DSL that allows a subset of Clojure to be automatically converted into a hardware description, which can then be placed onto an FPGA or made into a silicon chip.

47:57

Physical Pi

Posted by Romilly Cocking, Steve Freeman  on  Aug 24, 2013

Romilly Cocking explains how to make Pi interact with the outside world, from flashing LEDs to autonomous robots, with examples of how to connect to lights, motors, and sensors.

35:38

Getting Physical: Networked Hardware with Node.js

Posted by Ted Hayes  on  Apr 15, 2013

Ted Hayes discusses WiFi, XBee and their associated network topologies, and demoes controlling a networked pong game with a physical joystick using Node.js.

Lock-free Algorithms

Posted by Martin Thompson and Michael Barker  on  Apr 30, 2012 1

Martin Thompson and Michael Barker explain how Intel x86_64 processors and their memory model work along with low-level techniques that help creating lock-free software.

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