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Programming a 144-computer Chip to Minimize Power

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Summary

Chuck Moore discusses what it takes to program a 144-core asynchronous chip that consumes only 7 pJ/inst, the idle cores taking just 100 nW while the active ones need 4mW running at 666 Mips: tight coding to minimize the number of instructions executed, reducing instruction fetches, transistor switching, and duty cycle.

Bio

Chuck Moore is a computer engineer specializing in software, hardware and silicon. Invented the Forth computer language in 1968. Forth, Inc still programs embedded apps from telescope to database. Designed a Forth gate-array in 1983 and circuit boards to sell it. Its successor (RTX2000) is orbiting Saturn. Filed a valuable asynchronous patent in 1989, embodied in the Sh-Boom microprocessor.

About the conference

Strange Loop is a multi-disciplinary conference that aims to bring together the developers and thinkers building tomorrow's technology in fields such as emerging languages, alternative databases, concurrency, distributed systems, mobile development, and the web.

Recorded at:

Dec 18, 2013

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Community comments

  • Applications of this?

    by Maxime Chevalier-Boisvert /

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    Not to be sarcastic, but what's the main selling point of this exactly? Is it that you have to be extra-clever to program it efficiently, and will feel very smart after doing so? It's really too bad that no applications were shown. After watching this talk, I don't even know what the target market for this chip is, or what it could do so-very-efficiently that the competition can't. I have a hard time imagining useful applications for it.

  • Re: Applications of this?

    by John Passaniti /

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    There has been extensive discussion about this chip (and antecedents) in comp.lang.forth over the past few years and you're not the first to not see the application space this chip is designed for. And given that the content on InfoQ is overwhelmingly targeting "enterprise" software developers, I have no doubt there will be little understanding of why this chip even exists.

    In the presentation, Mr. Moore made constant reference to the chip's extremely low power consumption. That matters when you're talking about systems that must run off batteries, photovoltaic cells, Peltier, or piezo-based power-- and must run for months or years. These are embedded systems that aren't plugged in the wall; systems that are out in the world or inside your body. So imagine a bridge monitoring system that is powered by the vibrations of cars running on it, or think of a programmable and adaptive vision system for blind people.

    One real-world application where this chip was reportedly used in was as the signal processing in a programmable hearing aid. Dumb hearing aids are just amplifiers that make things louder. Smart hearing aids do signal analysis and are aware of psycho-acoustics and the individual's specific hearing loss. Mr. Moore also referenced "smart dust" which you are invited to look up on Wikipedia. This chip is the kind of computing architecture that enables that.

    For me, there are five essential ideas in these chips:


    • * Extremely low power per instruction (in part due to the chip not using a clock).

    • * Using the computers on the outer edge (the ones connected to I/O pins) to implement protocols and peripherals in software.

    • * Factoring large computation (like signal analysis and processing) into smaller computations across the many computers on the chip.

    • * Using a subset of the Forth language as the machine language of the chip.

    • * The ability to wildly scale this up by adding many more computers to the chip.


    One way to look at this chip is that it is more like a FPGA than a conventional processor. It's not a precise analogy, but it works well. There are also some elements of the XMOS processors, where I/O pins are defined in terms of software.

    Those outside the embedded systems realm probably don't see the value of all this. And that's fine; this chip is wildly inappropriate for the kind of applications that the InfoQ crowd typically is concerned with. But even for those people, I see tremendous value in studying this chip and its supporting language for the different perspective it comes from and from how it challenges your expectations.

  • Re: Applications of this?

    by Maxime Chevalier-Boisvert /

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    The problem is that there are already many competitors in the low-power embedded area. Chips that use more traditional programming models and have well-established tools. The ATMega8, for example, can run on a few microamps when in sleep mode, delivers 20 MIPS, and costs less than a dollar per unit. It also has the avr-gcc toolchain that is available on every platform, and plenty of real-world projects online to show you how to work with it.

    Granted, the AVR chip will deliver only 20 MIPS, but it can be programmed in C, it has a nice flat memory space, built-in flash and EEPROM, potentially lower power usage, and it's about 100 times cheaper. If you want more computing power, there's ARMs and DSPs that cost only a few dollars a piece and are also easy to work with. Those devices are a comfortable known territory for embedded developers out there.

    The problem is that Chuck Moore, in his talk, fails to *show any* running application for his chip. His emphasis is on clever little tricks you can do to get around what seems to be inherent design limitations of the chip. He seems to insist that his IDE does not support anything other than forth. You better be clever, or go home. If his goal was to intimidate people out of using his chip, he's probably succeeded. Most people are probably uncomfortable with the idea of computing jump addresses in their head and having to understand what's running on all cores at once.

    If I were making a hearing aid, I'd probably look into DSPs, devices that are made for signal processing, and I'd easily find an engineering graduate who knows how to work with them. Let's face it, we don't even know how tricky it would be to do signal processing on Chuck Moore's chip. At this point, we know each chip is very expensive, has only a few words of RAM per core, doesn't do floating-point, and can't be programmed in C. It's hard to even be sure that the sum of the computing power of all the cores translates into a net win over an ATMega8 once you factor in all the limitations (how many CPU cycles and RAM words are you wasting on setup and inter-core communication?).

    This is why, as Chuck Moore explains, he hasn't found any customers yet. He's got to actually prove his chip is better than what's out there. As of yet, what he has is clever tricks and bold claims. He needs to make something impressive with it, a killer app.

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