Gil Tene speaks to Alex Blewitt at QCon London 2016 on the upcoming support for hardware transactional memory in server-class Intel chips, and what it will mean for the JVM. Tene discusses what kinds of applications will benefit from speculative lock elision and increasing concurrency in the near future on multi-core server platforms.
Catherine & Raj have been working in Enterprise Agile transitions in large hardware manufacturers, they share their experiences and advice on leadership and bringing Scrum to hardware teams. They spoke at Agile 2012 about the use of tactile models, engaging managers and building cross-functional hardware-software teams.
Rupert Smith explains how to write low-latency code on plain JVMs (not realtime VMs) and how to avoid GC pauses. Also: how to exploit the capabilities of FPGAs to improve performance.
James Spooner explains how Data Flow Parallelism works and how it helps to design efficient parallel algorithms. Also: OOP vs. Parallelism.
James Grenning on Agile, from co-authoring the Manifesto, to fathering Planning Poker, to Agile for Embedded Development
James shares his experience as one of the Agile Manifesto co-authors, fathering the original Agile estimating game (which became Planning Poker) and how Agile methods fit with embedded software development. James also discusses his new book, Test Driven Development for Embedded C, while sharing some surprises, such as his recommendation that teams stop using Planning Poker.
John Nolan shows the state of hardware acceleration with GPUs and FPGAs, why it's hard to write efficient code for them, and why to favor polymorphism over if statements for performance.
Martin Thompson and David Farley discuss how to use the scientific method to create high performance systems by measuring performance and adapting the implementation to approach the limits of current hardware. The disruptor architecture is an open sourced result of their work at low-latency, high throughput systems for the retail trading platform of LMAX Ltd.